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Architecting a Reliable System MPMeister

Virendra Singh

生駒 : 奈良先端科学技術大学院大学, 2013.6

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Holdings:
  Volume Printing year Location Call Number Material ID Circulation class Status Waiting
1 MPMeister   Digital Library LA-I-R[Flash][Mobile] M010936 Regular 0
Contents Intro. : Relentless scaling of silicon fabrication technology coupled with lower design tolerances are making ICs increasing susceptible to wear-out related permanent faults as well as transient faults (soft errors). A well known technique for tackling both transient and permanent faults is redundant execution, specifically space redundancy, wherein a program is executed redundantly on different processors, pipelines or functional units and the results are compared to detect faults.
Publication year : 2013
Form : 電子化映像資料(1時間33分59秒)
Series title :

情報科学研究科・ゼミナール講演 ; 平成25年度

Note :

講演者所属: Indian Institute of Technology Bombay

講演日: 平成25年6月26日

講演場所: 情報科学研究科大講義室L1

Country of publication : Japan
Title language : English (eng)
Language of texts : English (eng)
Author information :

Singh, Viendra