Analog Computing: One Solution for Efficient Implementations of IoT

Analog Computing: One Solution for Efficient Implementations of IoT

Zhanng Renyuan

生駒 : 奈良先端科学技術大学院大学, 2017.5

学内論文

巻号情報

全1件
No. 刷年 所在 請求記号 資料ID 貸出区分 状況 予約人数

1

R013769

内容紹介

The cognitive functions play very important roles in the IoT tasks such as audio processing and visual processing. In these cognitive tasks, the human brain is much superior to traditional very large scale integrated (VLSI) processors or software programs in cognitive functions, since the brain can learn from samples autonomously. Therefore, plenty of machine learning algorithms have been developed to realize the learning operations, which were originally implemented by the software programs. Due to the reasons of power consumption and processing performances, a number of attempts to implement the machine learning algorithms were made by using hardware including graphic processing units (GPUs), field programmable gate array (FPGA), and VLSI circuits. Since many computations in the machine learning algorithms are very complex, the implementation costs including computing time and hardware utilization are greatly concerned. Furthermore, a large amount of iterations are always required by these algorithms, the learning speed is also a critical issue. Thus, the challenge on hardware implementations of learning algorithms lies on achieving a high processing speed with the consideration of limited hardware resource. In this talk, the parallel architecture for implementing learning algorithms is introduced by using analog computing techniques. Several analog circuitries are designed to carry out the complex functions such as Gaussian function and Euclidean distance. These computations in the learning algorithms can be done in real time within the compact chip area. On the basis of analog computational circuitries, a generally applied architecture in fully parallel is developed to implement some machine learning algorithms. Since the chaos of analog signals is used for learning instead of clock-based numerical iterations, the learning operation is accomplished autonomously and self- converges with a high speed. Obviously, the analog computing is not competitive to the digital fashions over accuracy and programmability. H

詳細情報

刊年

2017

シリーズ名

講義・講演レジュメ ; 平成29年度

情報科学研究科・ゼミナール講演 ; 平成29年度

注記

講演日: 平成29年5月15日

講演場所: 情報科学研究科大講義室L1

標題言語

日本語 (jpn)

本文言語

日本語 (jpn)

著者情報

Zhann, Renyuan