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Browsing by Author Iwagaki, Tsuyoshi

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Issue DateTitleAuthor(s)
Dec-2004Acceleration of transition test generation for acyclic sewuential circuits utilizing constrained combinational stuck-at test generationIwagaki, Tsuyoshi; Ohtake, Satoshi; Fujiwara, Hideo
Sep-2003A design scheme for delay fault testability of controllers using state transition informationIwagaki, Tsuyoshi; Ohtake, Satoshi; Fujiwara, Hideo
Sep-2003Reducibility of sequential test generation to combinational test generation for several delay fault modelsIwagaki, Tsuyoshi; Ohtake, Satoshi; Fujiwara, Hideo
30-Sep-2004Studies on Design for Delay Testability and Delay Test Generation for Sequential CircuitsIwagaki, Tsuyoshi
Showing results 1 to 4 of 4

 

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